Memory Wall: Stories

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Guo X, Bayat F M, Bavandpour M, et al. Fast, energy-efficient, robust, and reproducible mixed-signal neuromorphic classifier based on embedded NOR flash memory technology. In: Proceedings of IEEE International Electron Devices Meeting (IEDM), San Francisco, 2017. 1–4 Rogers B, Krishna A, Bell G, Vu K, Jiang X, Solihin Y (2009) Scaling the bandwidth wall: challenges in and avenues for CMP scaling. In: Proceedings of the 36th International Symposium on Computer Architecture, Austin, 20–24 June 2009. IEEE/ACM, Los Alamitos/New York, pp 371–382 AI 硬件（GPU）上，从而突破于单个硬件内存容量和带宽的限制。然而这么做 也会遇到内存墙 的问题：AI 硬件之间会遇到通信瓶颈，甚至比片上数据搬运更慢、效率更低。和单设备的内存墙问题类似，扩展 AI 硬件之间的网络带宽的技术难题同样还未被攻破。如图表4所示，其中展示了在过去20年中，硬件的峰值计算能力增加了90,000倍，但是内存/硬件互连带宽却只是提高了30倍。 而要增加内存和硬件互连带宽[1]，需要克服非常大的困难。 因此，分布式策略的横向扩展仅在通信量和数据传输量很少的情况下，才适合解决计算密集型问题。 SSD Prices Continue to Fall, Now Upgrade Your Hard Drive!". MiniTool. 2018-09-03 . Retrieved 2019-03-28.

Williams, F. C.; Kilburn, T.; Tootill, G. C. (Feb 1951), "Universal High-Speed Digital Computers: A Small-Scale Experimental Machine", Proc. IEE, 98 (61): 13–28, doi: 10.1049/pi-2.1951.0004, archived from the original on 2013-11-17. Tower invests in Crocus, tips MRAM foundry deal". EETimes. Archived from the original on 2012-01-19. Gallagher, Sean (April 4, 2013). "Memory that never forgets: non-volatile DIMMs hit the market". Ars Technica. Archived from the original on July 8, 2017. Xu S, Chen X, Wang Y, et al. PIMSim: a flexible and detailed processing-in-memory simulator. IEEE Comput Arch Lett, 2019, 18: 6–9 a b Robinson, Arthur L. (11 May 1984). "Experimental Memory Chips Reach 1 Megabit: As they become larger, memories become an increasingly important part of the integrated circuit business, technologically and economically". Science. 224 (4649): 590–592. doi: 10.1126/science.224.4649.590. ISSN 0036-8075. PMID 17838349.

AI加速器的设计

Seshadri V, Lee D, Mullins T, et al. Ambit: in-memory accelerator for bulk bitwise operations using commodity DRAM technology. In: Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), Boston, 2017. 273–287 Samsung Electronics Develops Industry's First Ultra-Fast GDDR4 Graphics DRAM". Samsung Semiconductor. Samsung. October 26, 2005 . Retrieved 8 July 2019. Samsung Develops the Industry's Fastest DDR3 SRAM for High Performance EDP and Network Applications". Samsung Semiconductor. Samsung. 29 January 2003 . Retrieved 25 June 2019.

a b Shilov, Anton (July 19, 2017). "Samsung Increases Production Volumes of 8 GB HBM2 Chips Due to Growing Demand". AnandTech . Retrieved 29 June 2019. a b c d e "Late 1960s: Beginnings of MOS memory" (PDF). Semiconductor History Museum of Japan. 2019-01-23 . Retrieved 27 June 2019. Samsung Electronics Starts Producing Industry's First 16-Gigabit GDDR6 for Advanced Graphics Systems". Samsung. January 18, 2018 . Retrieved 15 July 2019. a b c d "1970s: SRAM evolution" (PDF). Semiconductor History Museum of Japan . Retrieved 27 June 2019. Boroumand A, Ghose S, Patel M, et al. LazyPIM: an efficient cache coherence mechanism for processing-in-memory. IEEE Comput Arch Lett, 2017, 16: 46–50

a b "Samsung Electronics Announces JEDEC-Compliant 256Mb GDDR2 for 3D Graphics". Samsung Electronics. Samsung. 28 August 2003 . Retrieved 26 June 2019. The key to targeted cancer treatments is analyzing DNA samples to find patterns in genetic data, which then pinpoint specific treatments based on epidemiology. Center researchers set out to see just how much they could speed up that process, which scientists call “sequence alignment.”

MOS technology is the basis for modern DRAM. In 1966, Dr. Robert H. Dennard at the IBM Thomas J. Watson Research Center was working on MOS memory. While examining the characteristics of MOS technology, he found it was capable of building capacitors, and that storing a charge or no charge on the MOS capacitor could represent the 1 and 0 of a bit, while the MOS transistor could control writing the charge to the capacitor. This led to his development of a single-transistor DRAM memory cell. [15] In 1967, Dennard filed a patent under IBM for a single-transistor DRAM memory cell, based on MOS technology. [20] The first commercial DRAM IC chip was the Intel 1103, which was manufactured on an 8 μm MOS process with a capacity of 1 kbit, and was released in 1970. [9] [21] [22] Professors Tajana Rosing and Rob Knight, both faculty in the Department of Computer Science and Engineering at the University of California, San Diego, took the lead as primary investigators on the new CRISP initiative in addition to continuing their work contributing to faster cancer treatments. Knight is also a founding director of the Center for Microbiome Innovation in the Jacobs School of Engineering at UC San Diego and his research lab is a part of the UC San Diego School of Medicine. LeCun Y, Bottou L, Bengio Y, Haffner P. Gradient-based learning applied to document recognition. Proceedings of the IEEE. 1998 Nov;86(11):2278–324.

为什么不能靠多GPU堆显存

We are four years into developing novel architectures that will benefit society in ways not even imaginable a few years ago,” said Kevin Skadron, Harry Douglas Forsyth Professor of Computer Science at the UVA School of Engineering and Applied Science and center leader. Ahn J, Yoo S, Mutlu O, et al. PIM-enabled instructions: a low-overhead, locality-aware processing-in-memory architecture. In: Proceedings of ACM/IEEE 42nd Annual International Symposium on Computer Architecture (ISCA), Portland, 2015. 336–348 Killian, Zak (18 January 2018). "Samsung fires up its foundries for mass production of GDDR6 memory". Tech Report . Retrieved 18 January 2018.

One of the Most Successful 16K Dynamic RAMs: The 4116". National Museum of American History. Smithsonian Institution . Retrieved 20 June 2019.Yoshimoto, M.; Anami, K.; Shinohara, H.; Yoshihara, T.; Takagi, H.; Nagao, S.; Kayano, S.; Nakano, T. (1983). "A 64Kb full CMOS RAM with divided word line structure". 1983 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. Vol.XXVI. pp.58–59. doi: 10.1109/ISSCC.1983.1156503. S2CID 34837669. Samira Khan, assistant professor of computer science, and Mircea Stan, Virginia Microelectronics Consortium Professor in the Charles L. Brown Department of Electrical and Computer Engineering, are on the team of UVA researchers leading the center since 2018. Wu B, Wan A, Yue X, Keutzer K. Squeezeseg: Convolutional neural nets with recurrent crf for real-time road-object segmentation from 3d lidar point cloud. In2018 IEEE International Conference on Robotics and Automation (ICRA) 2018 May 21 (pp. 1887–1893). IEEE.